CDCP1803 buffer equivalent, 1:3 lvpecl clock buffer.
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* Distributes One Differential Clock Input to Three LVPECL Differential Clock Outputs
* Programmable Output Divider for Two LVPECL Outputs
* Low-Output Skew.
the CDCP1803 also provides a VBB output terminal that can be directly connected to the unused input as a common-mode vo.
The CDCP1803 clock driver distributes one pair of differential clock inputs to three pairs of LVPECL differential clock outputs Y[2:0] and Y[2:0] with minimum skew for clock distribution. The CDCP1803 is specifically designed for driving 50-Ω transmi.
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